LVDS CABLE

LVDS is the preferred signal form of high-speed I/O interface to solve the limitation of high-speed data transmission, because it has advantages in transmission speed, power consumption, anti-noise, EMI and so on.

1. high speed transmission capability. In the standard of LVDS defined by ANS/EIA/Eia -64, the theoretical limit speed is 1.923 Gbps. The constant current source mode and low swing output mode determine that IVDS has high-speed driving capability.
2.  low power consumption characteristics. The power consumption of LVDS is only 1.225 MW when the driving current of constant current source is 3.5 Ma and the load (100 ω terminal matching) is only 1.225 MW. The power consumption of LVDS is constant, unlike the dynamic power dissipation of CMOS transceivers relative to frequency. The drive design of constant current source mode reduces the power consumption of the system and greatly reduces the influence of frequency components on power consumption. Although the power consumption of CMOS is lower than that of LVDS when the speed is lower, the power consumption of CMOS will gradually increase with the increase of frequency, and eventually need to consume more power than that of LVDS. Typically, LVDS and CMOS consume roughly the same power when the frequency is equal to 200 msps.
3. Low supply voltage. With the development of integrated circuits and the requirement of higher data rate, low-voltage power supply is urgently needed. Reducing the supply voltage not only reduces the power consumption of high-density integrated circuits, but also reduces the internal heat dissipation pressure, which helps to improve the integration. LVDS drivers and receivers do not depend on specific supply voltage characteristics, which determines its dominance in this area.
4. strong anti-noise ability. The inherent advantage of the differential signal is that the noise is coupled on a pair of differential lines in a common mode and subtracted in the receiver to eliminate the noise, so LVDS has a strong ability to resist the common-mode noise.
5. effectively suppress electromagnetic interference. Due to the opposite polarity of the differential signals, the electromagnetic fields they radiate can cancel each other out. The more tightly coupled they are, the less electromagnetic energy they can release to the outside world, which reduces EMI.
6. timing positioning accuracy. Because the differential signal switch change is located at the intersection of the two signals. Unlike the ordinary single-ended signal depends on high and low two threshold voltage judgment, so the process, the temperature of the impact of small, can reduce the timing error, conducive to the effective transmission of high-speed digital signal.
7. to adapt to the ground level voltage changes in a wide range. The LVDS receiver can withstand ground voltage changes between the driver and the receiver at least 1v. Due to the IVDS driver’s typical bias voltage of + 1.2 V, the ground voltage change, the driver’s bias voltage, and the sum of the slightly coupled noise at the receiver’s input, the ground is the common-mode voltage relative to the driver. When the swing is less than 400 mv, the common mode range is + 0.2 v ~ + 2.2 V, and then, in general, the input voltage range of the receiver can vary within 0V ~ + 2.4 V.                                                               It is because LVDS has the above main characteristics that HyperTransport (by AMD) , Irfiniband (ly Intel) , pCI-Express (by Intel) and other third generation I/O bus standards (3G IO) have adopted low voltage differential signal (IVDS) as the next generation high-speed signal level standard.